1. Field of the Invention
The present invention relates to the field of computers and computer processors, and more particularly to a method and means for a more efficient use of a stack within a stack computer processor.
2. Description of the Background Art
Stack machines offer processor complexity that is much lower than that of Complex Instruction Set Computers (CISCs), and overall system complexity that is lower than that of either Reduced Instruction Set Computers (RICSs) or CISC machines. They do this without requiring complicated compilers or cache control hardware for good performance. They also attain competitive raw performance, and superior performance for a given price in most programming environments. Their first successful application area has been in real time embedded control environments, where they outperform other system design approaches by a wide margin. Where previously the stacks were kept mostly in program memory, newer stack machines maintain separate memory chips or even an area of on-chip memory for the stacks. These stack machines provide extremely fast subroutine calling capability and superior performance for interrupt handling and task switching.
However, there is no hardware detection of stack overflow or underflow conditions. Stack overflow occurs when there are not a sufficient number of registers available and results continue to be pushed onto the stack, causing the bottom register(s) to be overwritten. Stack underflow occurs when all registers have been emptied, and continued popping of a stack produces unintentional or incorrect results. Some other stack processors use stack pointers and memory management such that an error condition is flagged when a stack pointer goes out of range of memory allocated for the stack. U.S. Pat. No. 6,367,005 issued to Zahir et al. disclose a register stack engine, which saves to memory sufficient registers of a register stack to provide more available registers in the event of stack overflow. The register stack engine also delays the microprocessor until the engine can restore an appropriate number of registers in the event of stack underflow.
U.S. Pat. No. 6,219,685 issued to Story discloses a method of comparing the results of an operation with a threshold value. However, this approach does not distinguish between results that are rounded down to the threshold value (which would raise an overflow exception) and results that just happen to equal the threshold value. Another method disclosed by Story reads and writes hardware flags to identify overflow or underflow conditions. However, the instructions must be performed sequentially, and any instructions following a register read/write can not proceed until the read/write operation is completed, which makes for a slow process.
With a stack in memory, an overflow or underflow would overwrite a stack item or use a stack item that was not intended to be part of the stack. A need exists for an improved method of reducing or eliminating overflow and underflow within a stack.